Speculative execution

Results: 34



#Item
11Functional programming / Functional languages / Year of birth missing / Type theory / ICFP Programming Contest / Generic programming / Bluespec /  Inc. / Haskell / International Conference on Functional Programming / Software engineering / Computing / Programming language theory

ICFP 2008 Final Program Monday, Sep 22, 2008 Invited Talk (Chair: Peter Thiemann) 9:00 Lazy and Speculative Execution in Computer Systems Butler Lampson; Microsoft Research

Add to Reading List

Source URL: www.icfpconference.org

Language: English - Date: 2009-06-10 17:01:37
12Parallel computing / Threads / Compiler optimizations / Speculative multithreading / Java virtual machine / MAJC / Multithreading / Automatic parallelization / Speculative execution / Computing / Concurrency control / Cross-platform software

Christopher J. F. Pickett Ph.D. Thesis Proposal

Add to Reading List

Source URL: www.sable.mcgill.ca

Language: English - Date: 2009-11-25 20:55:44
13Java platform / Threads / Concurrent computing / Thread-local storage / Java bytecode / Java virtual machine / Speculative execution / Java / Thread / Computing / Cross-platform software / Concurrency control

LNCSSoftware Thread Level Speculation for the Java Language and Virtual Machine Environment

Add to Reading List

Source URL: www.sable.mcgill.ca

Language: English - Date: 2007-06-20 19:15:38
14Concurrency control / Parallel computing / Programming language implementation / Cross-platform software / Threads / Speculative multithreading / Multithreading / Speculative execution / Speculative / Computing / Computer architecture / Concurrent computing

McGill University School of Computer Science Sable Research Group Speculative Multithreading in a Java Virtual Machine Sable Technical Report No

Add to Reading List

Source URL: www.sable.mcgill.ca

Language: English - Date: 2005-05-30 18:46:05
15Parallel computing / Computer architecture / Graphics hardware / Video cards / Nvidia / OpenCL / CUDA / Kernel / Thread / Computing / GPGPU / Computer hardware

Speculative Execution on Multi-GPU Systems Gregory Diamos and Sudhakar Yalamanchili School of Electrical and Computer Engineering Georgia Institute of Technology Atlanta, Georgia 30332–0250

Add to Reading List

Source URL: www.gdiamos.net

Language: English - Date: 2011-06-30 03:27:09
16Concurrency control / Threads / Concurrent computing / Computer architecture / Speculative multithreading / Heuristic / Speculative execution / Automatic parallelization / Speedup / Computing / Parallel computing / Computer programming

Heuristics for Profile-driven Method-level Speculative Parallelization John Whaley and Christos Kozyrakis Computer Systems Laboratory Stanford University {jwhaley,kozyraki}@stanford.edu

Add to Reading List

Source URL: suif.stanford.edu

Language: English - Date: 2007-04-01 19:35:00
17Central processing unit / Computer memory / Computer errors / Speculative execution / CPU cache / Kernel / Debugging / Microarchitecture / Software bug / Computing / Computer architecture / Computer hardware

Empowering Software Debugging Through Architectural Support for Program Rollback Radu Teodorescu and Josep Torrellas Department of Computer Science University of Illinois at Urbana-Champaign http://iacoma.cs.uiuc.edu

Add to Reading List

Source URL: iacoma.cs.uiuc.edu

Language: English - Date: 2005-07-29 18:41:35
18Computer architecture / CPU cache / Memory disambiguation / Squash / Branch predictor / Parallel computing / Central processing unit / Monitor / Speculative execution / Computer memory / Computing / Computer hardware

Eliminating Squashes Through Learning Cross-Thread Violations in Speculative Parallelization for Multiprocessors Marcelo Cintra Josep Torrellas 

Add to Reading List

Source URL: iacoma.cs.uiuc.edu

Language: English - Date: 2001-12-10 19:25:05
19Central processing unit / Cache / CPU cache / Computer memory / Microarchitecture / AMD 10h / Parallel computing / LEON / Speculative execution / Computer hardware / Computer architecture / Computer engineering

The Design Complexity of Program Undo Support in a General-Purpose Processor Radu Teodorescu and Josep Torrellas Department of Computer Science University of Illinois at Urbana-Champaign http://iacoma.cs.uiuc.edu

Add to Reading List

Source URL: iacoma.cs.uiuc.edu

Language: English - Date: 2005-10-16 18:49:08
20Computer engineering / CPU cache / Microarchitecture / Speculative execution / Processor register / Application checkpointing / Parallel computing / Instruction set / Multithreading / Computer architecture / Computer hardware / Central processing unit

Prototyping Architectural Support for Program Rollback Using FPGAs ∗ Radu Teodorescu and Josep Torrellas Department of Computer Science University of Illinois at Urbana-Champaign {teodores,torrellas}@cs.uiuc.edu

Add to Reading List

Source URL: iacoma.cs.uiuc.edu

Language: English - Date: 2005-05-11 13:27:29
UPDATE